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@ -134,7 +134,7 @@ write `0` otherwise. |
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Flips value in `C`. Use it to implement 'not equal', 'greater or equal', |
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and 'less or equal' comparisons. |
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### BIT SHIFT |
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### BIT SHIFT RIGHT |
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``` |
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+—+—+—+—+—+—————+ |
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@ -146,11 +146,27 @@ and 'less or equal' comparisons. |
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`M` — mode of operation, `0` — logical shift, `1` — circular shift. |
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`L` — length of shift. |
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### BIT SHIFT LEFT |
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``` |
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+—+—+—+—+—+—————+ |
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|1|1|0|R|M|L L L| |
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+—+—+—+—+—+—————+ |
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``` |
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`R` — `0` to shift bits in `R0` register, `1` in `R1` register. |
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`M` — mode of operation, `0` — logical shift, `1` — circular shift. |
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`L` — length of shift. |
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### INCREMENT |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|0|0|0|0|0|R| |
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|1|1|1|0|0|0|0|R| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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@ -162,7 +178,7 @@ Increments ALU register and sets `C` if result is zero. |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|0|0|0|0|1|R| |
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|1|1|1|0|0|0|1|R| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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@ -174,7 +190,7 @@ Decrements ALU register and sets `C` if result is zero. |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|0|0|0|1|0|0| |
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|1|1|1|0|0|1|0|0| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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@ -185,7 +201,7 @@ Sets `C` if result overflows. |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|0|0|0|1|0|1| |
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|1|1|1|0|0|1|0|1| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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@ -196,7 +212,7 @@ Sets `C` if result underflows. |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|0|0|0|1|1|0| |
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|1|1|1|0|0|1|1|0| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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@ -207,7 +223,7 @@ and storing result in `R0`. |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|0|0|0|1|1|1| |
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|1|1|1|0|0|1|1|1| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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@ -218,7 +234,7 @@ and storing result in `R0`. |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|0|0|1|0|0|0| |
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|1|1|1|0|1|0|0|0| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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@ -229,7 +245,7 @@ and storing result in `R0`. |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|0|0|1|0|0|1| |
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|1|1|1|0|1|0|0|1| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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@ -240,10 +256,152 @@ and storing result in `R0`. |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|0|0|1|0|1|R| |
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|1|1|1|0|1|0|1|R| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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Flip all bits in ALU register. |
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`R` — `0` to use `R0`, `1` to use `R1`. |
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### VARIABLE BIT SHIFT |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|0|1|1|D|M| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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Shifts value in `R0` by length specified in `R1` and stores result in `R0`. |
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If `R1` value is greater than 8, `R0` is zeroed. |
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`C` is set if `R0` is zeroed. |
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`D` — direction: `0` to shift bits right, `1` — left. |
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`M` — mode of operation, `0` — logical shift, `1` — circular shift. |
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### COPY |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|1|0|0|0|R| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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`R` — `0` to copy data from `R0` to `R1`, `1` to copy data from `R1` to `R0`. |
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### SETC |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|1|0|0|1|C| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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`C` — value copied to `C` flag. |
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### NOP |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|1|0|1|0|0| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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### HALT |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|1|0|1|0|1| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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Resets CPU registers and memory and zeroes `IP`. |
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### CLOAD |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|1|0|1|1|R| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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Loads byte from `CODE` segment at address specified in `R0` |
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and puts it into ALU register. |
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`R` — `0` to store result in `R0`, `1` to store result in `R1`. |
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### ZERO |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|1|1|0|0|R| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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`R` — `0` to zero out `R0`, `1` to zero out `R1`. |
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### DIV |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|1|1|0|1|0| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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Divides `R0` by `R1`. Stores quotient in `R0` and remainder in `R1`. |
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If `R1` is 0 before division, sets `R0` to all ones and `R1` to all zeroes, |
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also sets `C` flag. |
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### MUL |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|1|1|0|1|1| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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Multiplies `R0` by `R1`. Result is unsigned 16-bit value. Most significant |
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byte is stored in `R0` and least significant byte is stored in `R1`. |
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### SWAP |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|1|1|1|0|0| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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Swaps values of `R0` and `R1`. |
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### PORT READY |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|1|1|1|0|1| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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If there is data available to read from port, sets `C` flag. |
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Otherwise, unsets `C` flag. |
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### READ PORT |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|1|1|1|1|0| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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Reads byte from port and stores result in `R0`. If there is no |
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data available from port, zeroes out `R0`. |
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### WRITE PORT |
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``` |
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+—+—+—+—+—+—+—+—+ |
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|1|1|1|1|1|1|1|1| |
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+—+—+—+—+—+—+—+—+ |
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``` |
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Writes byte from `R0` to port. |
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